kd's homebrew archive // 450 GiB free of 1.78 TiB

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-W10_L1_x86 vs RISC-V [j8rJnRKShT8].mkv1815084772025-09-16 17:52:18
-W10_L2_Multicycle Processor Motivation [WU3VmK1qkFI].mkv1235426882025-09-16 17:56:31
-W10_L3_Multicycle Data and Control Path [vUmLdX3G9OQ].mkv2235389992025-09-16 17:51:40
-W10_L4_Multicycle vs Single Cycle Performance [b_TEDHKcHQM].mkv1531753142025-09-16 17:51:56
-W10_L5_Pipelined Processor Motivation [EQMaNeVLENI].mkv1821976782025-09-16 17:51:56
-W10_L6_Pipelined Processor Timing Representation [v6WLmAfjLEo].mkv1218273782025-09-16 17:56:24
-W11_L1_Two Stage Pipelined Processor [ur6LvZYFmyM].mkv3834375042025-09-16 17:53:03
-W11_L2_Read After Write [OKuTfYN_EA4].mkv2844344382025-09-16 17:53:00
-W11_L3_Data Hazards [Uujf7NQLdrg].mkv2378772092025-09-16 17:53:40
-W11_L4_Control Hazards [SqIEcAZQNxs].mkv1845429542025-09-16 17:53:34
-W11_L5_Timing Analysis of 5 Stage Pipelined Processor - I [JQEuN7pbVIE].mkv2278708492025-09-16 17:54:26
-W11_L6_Timing Analysis of 5 Stage Pipelined Processor - II [S1YWxyQXgCs].mkv2441920282025-09-16 17:54:17
-W12_L1_Problem Sloving_Stuck-at-0 [pZyh_Px2dp8].mkv912194882025-09-16 17:59:22
-W12_L2_Problem Sloving adding instructions [f1zn9lNUo2U].mkv2368309522025-09-16 17:54:45
-W12_L3_Problem Sloving adding complex instructions [5fWnUBZNeMw].mkv2288751692025-09-16 17:55:04
-W12_L4_Advanced Microarchitecture 1 [agTYIF_BzW4].mkv1216960392025-09-16 17:55:55
-W12_L5_Advanced Microarchitecture-2 [0z-_iTMp3Do].mkv2146126662025-09-16 17:55:22
-W12_L6_Cache Memory [MUMCCSwGl_I].mkv801736212025-09-16 17:55:35
-W1_L1_Course_Introduction [NHooGxbT2aw].mkv1761442702025-09-16 17:40:47
-W1_L2_Module Introduction [PeKA6AhUq4s].mkv2133226372025-09-16 17:39:32
-W1_L3_x86_Architecture [HaiOngQdRGQ].mkv2508720402025-09-16 17:39:33
-W1_L4_x86_Instruction Set [sS4DOO-JiII].mkv1811146592025-09-16 17:39:28
-W1_L5_Assembly program exercise [aOiDl_S6znQ].mkv1067960762025-09-16 17:39:42
-W1_L6_Memory Segments [11NFe8BRU30].mkv1856743162025-09-16 17:39:49
-W1_L7_Immediate Data Access [_W-uX4J3Vqo].mkv1587923842025-09-16 17:39:51
-W2 L2 Jump instructions part 2 [vqtOC0rGXnI].mkv2067977882025-09-16 17:40:06
-W2_L1_Jump instructions - part 1 [izn13ipx9KQ].mkv2132338292025-09-16 17:40:19
-W2_L3_Stack instructions [xz6a7V8guS0].mkv2209308832025-09-16 17:44:33
-W2_L4_Swap example in assembly [8MK2fWgb3ts].mkv1789243922025-09-16 17:40:23
-W2_L5_CALL & RET instructions [YOrVhIVE8vI].mkv1723546222025-09-16 17:40:41
-W2_L6_String Instruction - movsb [YSZnlT33Sfk].mkv2260526472025-09-16 17:40:46
-W2_L7_String Instruction - scasb, cmpsb [CoVu_Lk2AbI].mkv1644431422025-09-16 17:40:59
-W3 L4 Function to swap variables [s2rN2GZHFbc].mkv1837353152025-09-16 17:41:22
-W3_L1_Introduction to Inline Assembly Programming [g_7_DVncIP8].mkv2800010242025-09-16 17:41:11
-W3_L2_Multiplication example [llhXoUd496Y].mkv1196467402025-09-16 17:41:05
-W3_L3_String length example [gawmjkXjhbQ].mkv1161737312025-09-16 17:41:15
-W3_L5_Preprocessor [L0CR1O2Mnn4].mkv1914429702025-09-16 17:41:28
-W3_L6_Compiler & Linker [0vz11OXHSVg].mkv1368167702025-09-16 17:44:45
-W3_L7_Object File [VvlJB11JXpM].mkv1676444782025-09-16 17:42:14
-W4_L1_Compilation [NG6YFPFRGho].mkv2303177872025-09-16 17:44:28
-W4_L2_Execution flow and stack [5-eP4arqMyk].mkv1206920532025-09-16 17:44:00
-W4_L3_Prologue & Epilogue [kAhhqgmP7F8].mkv803712522025-09-16 17:44:31
-W4_L4_Passing fewer arguments [CfV4yGNyFSE].mkv1544786962025-09-16 17:44:43
-W4_L5_Passing more arguments [auV1EDwtbWI].mkv1284736772025-09-16 17:44:57
-W4_L6_Pushing Parameters [bc7bTvi8icE].mkv1395839062025-09-16 17:44:56
-W4_L7_Calling Convention： __fastcall [0hqGuimPIL4].mkv1379120322025-09-16 17:45:02
-W5_L1_Memory Alignment - I [Tr_8ckJzPCo].webm861667432025-09-16 17:46:37
-W5_L2_Memory Alignment - II [Y8BOlK3s9OY].mkv1909657132025-09-16 17:48:21
-W5_L3_Implementation of printf() [KiBAAi-wJck].mkv1947245662025-09-16 17:45:21
-W5_L4_Pass by Value [lrSX6yWkzTs].mkv2116437612025-09-16 17:45:23
-W5_L5_Pass by Pointer [Yb4lWuNX8UE].mkv3700317252025-09-16 17:45:46
-W5_L6_Recursive Function [U8AdWW_Enac].mkv1016694452025-09-16 17:45:45
-W5_L7_Recursion vs Loop - Effect on Stack [XReTkcCSn_Q].mkv1262244812025-09-16 17:46:00
-W5_L8_Security of Local Variables [mC-BdvQmoBk].mkv778508392025-09-16 17:46:00
-W5_L9_C++ ： ＂this＂ pointer [LPirIrp991A].mkv1351846532025-09-16 17:46:16
-W6_L1_Delay of a combinational circuit [LXUXFxjvTHs].mkv1890210112025-09-16 17:48:10
-W6_L2_Intro to Static Timing Analysis [YZ-h4KI57mE].mkv2044432732025-09-16 17:48:11
-W6_L3_Timing Parameters of a Flip Flop [6hX571Lv3WY].mkv948035432025-09-16 17:47:10
-W6_L4_Timing Constraints of a System [6X2ynNyv9RE].mkv1315457232025-09-16 17:47:23
-W6_L5_STA of a Pipelined System [ajheQFk_BuA].mkv1910250962025-09-16 17:47:39
-W6_L6_Why Pipeline a System？ [-G-qkkeVprg].mkv2261695032025-09-16 17:47:55
-W7_L1_Sequential Adder [OhBy9zQXAyQ].mkv1998820082025-09-16 17:48:12
-W7_L2_Elements of a datapath [TIEmEm-aQ3I].mkv2540171002025-09-16 17:48:32
-W7_L3_Register File [iaA2zGpKQto].mkv1700410132025-09-16 17:48:28
-W7_L4_Op Code [LIHkQOKf_HY].mkv951530982025-09-16 17:48:26
-W7_L5_Timing Analysis for Register File [s_GSRnb9b0E].mkv2203539482025-09-16 17:48:55
-W7_L6_Register File Write Back [bHEjPsyl4OQ].mkv4051172432025-09-16 17:48:59
-W8_L1_RISC vs CISC [ikuqkIutnKE].mkv1641757322025-09-16 17:49:01
-W8_L2_Compilation Example： RISC vs CISC [iTm_iaaqw5M].mkv2423088212025-09-16 17:49:13
-W8_L3_Interpreting Machine Code [f1md0iX0uTU].mkv1441859012025-09-16 17:49:32
-W8_L4_Op Code Construction [9RRjveH2qWI].mkv1195677052025-09-16 17:49:22
-W8_L5_Machine Code in RISC [-gYzJXVoReE].mkv1361083142025-09-16 17:49:31
-W8_L6_Other Instruction Formats [pQMD3ioZ_d0].mkv911092362025-09-16 17:49:43
-W8_L7_Pseudo Instructions [rj465B6Qc6Q].mkv1980779852025-09-16 17:50:49
-W9_L1_Single Cycle Datapath - Load Word [vkzXeOuvpng].mkv3706555982025-09-16 17:50:21
-W9_L2_Single Cycle Datapath - More Instructions [fMH5rib16mo].mkv3181720092025-09-16 17:49:54
-W9_L3_Single Cycle Control Path [dBok5kVc3OA].mkv1577261452025-09-16 17:50:29
-W9_L4_Single Cycle Extended Instructions [89PWdB30sm0].mkv1962322402025-09-16 17:50:11
-W9_L5_Single Cycle Performance Introduction [dc-I6BFWzxA].mkv2138364462025-09-16 17:50:28
-W9_L6_Single Cycle Performance R-Type [EC6RPc6X5pM].mkv1328861152025-09-16 17:51:09
-W9_L7_Single Cycle Performance Store and Load Word [z4XnOlL-Jt0].mkv1176003862025-09-16 17:50:52

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